1. Technical Field
The present invention relates to a semiconductor module.
2. Related Art
Within a semiconductor module, to which a high voltage may be applied, a semiconductor device is placed on a laminate substrate. The laminate substrate includes an insulative plate made of ceramics or the like, a circuit board disposed on the front surface of the insulative plate, and a metal plate disposed on the back surface of the insulative plate. On the circuit board, the semiconductor device is placed. As a high voltage is applied to the semiconductor device, a high voltage is also applied to the circuit board. In particular, the edge portions of the circuit board are exposed to a higher electrical field intensity than the other portions of the circuit board. In the conventional art, to reduce the electrical field intensity at the edge portions of the circuit board, the interval between the edge portions of the ceramics layer and the edge portions of the circuit board has been made smaller than the interval between the edge portions of the ceramics layer and the edge portions of the metal plate (see, for example, Japanese Patent Application Publication No. 2002-270730).
The present invention employs a novel approach to reduce the electrical field intensity, to a level lower than in the conventional art, at the circuit board on which the semiconductor device is placed in the semiconductor module, to which a high voltage may be applied.